1. Field of the Invention
The present invention relates to a composition and process useful for removal of post-etch photoresist and/or sacrificial anti-reflective coating material from a substrate or article having such material deposited thereon.
2. Description of the Related Art
Semiconductor integration as currently evolving requires (i) use of antireflective coatings, (ii) minimization of etch/ash-induced damage to low k dielectric material, (iii) minimization of effective k values for dielectric/etch stop interconnect layers and (iv) wide process latitude in terms of permissible conditions and variation of integration techniques.
The foregoing requirements can be accommodated by use of etching operations without ashing, using a dielectric patterning process that employs a sacrificial antireflective coating, in combination with a liquid cleaning chemistry that removes the post-etch photoresist and SARC in a single process step.
Current photolithography processes used in semiconductor manufacturing require use of a UV/light-absorbing coating below the photoresist layer to prevent reflection of the stepper UV light. Without this coating, significant amounts of light are reflected off the underlying substrate. Such reflected light, in turn, can create defects during the photolithographic process, such as photoresist notching resulting from constructive and destructive interference, non-uniform photospeed, occurrence of gross photolithographic pattern defects, loss of critical dimensioning capability, and the like.
Several approaches exist for attaining high absorbance of UV light in photolithographic processes, including use of bi- and tri-layer photoresists, use of bottom antireflective coatings (BARCs) and sacrificial antireflective coatings (SARCs). All of these approaches incorporate a UV chromophore into a spin-on polymer matrix that absorbs incident light. All of these antireflective coatings also have a planarizing effect on topological wafer surfaces encountered in typical dual damascene integration.
When SiOC-based dielectric materials are employed in the semiconductor integration, however, the use of SARCs has two important advantages over the other approaches mentioned above.
First, since SARC materials are based on tetraethylorthosilicate (TEOS), they are etchable in a similar manner and at similar rate to SiOC-based dielectric material. This allows a very high level of etch uniformity and etch control to be achieved, to such extent that trench etch stop layers are not required, and via etch stop layers can be reduced in thickness by up to 50%, in relation to the aforementioned alternative approaches.
Second, etched SARCs can be removed by liquid cleaner/etchant compositions, since etched SARCs do not significantly increase their degree of cross-linking after etch, in relation to organic-based photoresists and BARCs.
When a cleaner/etchant composition is used in back-end-of-line (BEOL) applications to process aluminum or copper interconnected wires, separated by low capacitance (low k) insulating material, or dielectric, it is important that the composition used to remove photoresist residue and SARCs possess good metal compatibility, e.g., a low etch rate on copper, aluminum, cobalt, etc.
Untreated photoresist possesses solubility in strong aqueous alkaline solutions as well as solutions of select organic solvents. However, photoresist that has been exposed to gas-phase plasma etching, such is typically used for etching of dielectric materials, will develop a hardened crust on the surface of the material. The hardened crust is composed of cross-linked organic polymer and may contain small amounts of silicon or metal atoms. Fluorine-based plasma etches as used in dual damascene processes may deposit fluorine atoms in the photoresist crust, which may decrease its solubility and increase its resistance to chemical removal.
The photoresist and crust can be removed by gas phase ashing where the substrate is exposed to an oxidative or reductive plasma etch, but these plasma ashing techniques can cause damage to the dielectric, especially porous, organosilicate or organic low k materials, causing an unacceptable increase in k value. The semiconductor features of the structure being fabricated may contain metals vital to the operation of the eventual product chip, such as copper, aluminum and alloys of cobalt.
Hydroxylamine solutions have been utilized in the art for photoresist removal, but such solutions have associated corrosion, toxicity and reactivity problems that limit their use, with adverse corrosion effects being particularly problematic when copper is employed in the integrated circuitry.